Sequence Generator To Derive 8-Phase Variable Reluctance Stepper Motor

Literature survey indicates that the design of sequence generator is considered for a few number of control sequences of stepper motor. In our research a new circuit is built in a simple design for generation of all required sequences up to eight phases for Variable Reluctance (V.R.) stepper motor .This circuit must be followed by a power drive circuit to achieve the power requirement of the stepper motor. In case of getting a certain sequence , these data must be given to the system ; number of phases, number of 1 energized phases, type of sequence (full step or half step mode) and finally the direction of rotation, hence the system in response will generate the required sequence. Some papers previously used SSI & MSI circuits to build the sequence generator ,but in this paper an LSI (EPROM) circuit as well as SSI & MSI circuits are used to get minimal design with less components. The paper includes a brief description of the fundamentals of sequences controlling the stepper motor, the detailed proposed circuit description and samples of experimental results with an appendix illustrating a complete map of the EPROM which is used to store all required sequences.  وم دل تاراشلإا قوسل  رحم لا ك ةوطخ عون ةريغتملا ةيسيطانغملا ةعنامملا دحلو 8 -


Introduction
The basic principle of variable reluctance motors have been known for long time [ 1 ], therefore it is surprising that a new structure has been still invented a few years ago [ 2 ]. The sequence generator of the stepper motor can be derived from different ways such as a parallel port of a personal computer which was used in controlling multiple stepper motors in a robotic manipulator arm [ 3 ].
Sequences which control the drive unit and rotate the stepper motor with a uniform motion are defined here as control sequences (switching sequences). Generation of such sequences depends basically on the characteristics of the sequence generator (translator) as well as the frequency of input clock.
There are two basic types of sequences that could be generated for a variable reluctance stepper motor.
Type (A): Sequences that provide equal number of energized phases at any time. Type (B): Sequences that provide different number of energized phases alternatively. A short-hand notation used for identifying the control sequence:   Two additional tables can be obtained in the same manner only by changing the positive sign to negative (Negative control sequences). For all tables, the total number of control sequences is equal to ( 96 ).
For illustration, an example for type A sequences like +3(1,1) is considered which identifies a 3-phase stepper motor with single phase energized at any one time with clockwise rotation. For type B sequences consider +3(2,1) which represents a three phase motor having two energized phases initially then one followed by two and so on alternatively. [ 5 ] By Concerning the sign which mean clockwise or counter clockwise rotation, 4 types of control sequences could be generated, figures (1 and 2 ) illustrate the clockwise rotation for type A and B respectively. From the above figures, it is clear that for type A control sequences the number of pulses is equal the number of phases to complete one revolution (full step mode ),while for type B the number of pulses is equal twice the number of phases (half step mode) . There is also another technique which is called micro stepping control that allows stepper motion to take fractional steps, by having two adjacent field poles energized at the same time using a specialized integrated circuit L292 made by SGS-THOMSON [ 6 ] .
Field Programmable Gate Array (FPGA) also used to improve the positioning accuracy of two phase stepper motor [ 7 ] .

Analysis Of Step Angle & Static Pull Out Torque:
The step angle and static pull out torques for up to 8-phase variable reluctance motor can be derived easily in consideration the ideal case assuming motor phases have enough separation for the magnetic interferences to be ineffective. The resultant torque when set of phases are energized is equal to the vector sum of individual energized phase. The pull out static torque for each phase is assumed to be (T) and is equal for all phases.
From vector diagrams of fig.(1) & fig.(2) respectively the step angle will decrease from (120°) in case of single energized phase to (60°) in case of (2F) energized at a time. The resulting torque will be (T) i.e. no change from single energized phase case. Fig.(4) indicates that step angle is halved and the torque increased to ( 1.41 ) over that produced when only single phase excited while the excitation current drawn by the motor will be doubled. For (3F) energized at a time step angle is (45°) and the torque will not be changed while the excitation current is increased to 3 times.

Fig. (4) : 4-phase vector diagram
The following table can be concluded for static pull torque for variable reluctance motor up to (6F) , more than (6F) can be derived in the same manner. The incremental positioning (step angle) of a stepper motor can be represented by the following equation: Step Where N=X for type A sequences, N=2X for type B sequences. Finally the overall speed (Rev/ Min) of the stepper motor can be derived as:

Design of Sequence Generator Using SSI & MSI Circuits:
Sequence generator can be designed using shift register with its corresponding preset and control logic circuits. As shown in fig. ( 5 ) which consists of SSI and MSI circuits with the facility of shift register to shift right or left to achieve positive or negative control sequences required for the control of the rotation of the stepper motor.
The basic function of the shift register (which is a set of flip flops) is to provide the sequence generator (translator) unit with the memory which provides temporary storage of information (bit pattern of control sequence), and to control its outputs which feed phases of stepper motor after certain power amplification.
Boolean expressions for the above sequences can be derived using Karnaugh map which is one of the basic minimization techniques but as well known this map is not valid for number of input variables greater than six, since adjacency of miniterms in maps becomes difficult [ 8 ], also even though we apply other minimization techniques such as Quine-McClusky Tabulation method to overcome this limitation to reach eight variables ( 8-phase stepper motor), this approach is not an effective technique since the derived Boolean expressions are not generalized equations i.e. can not be expanded when number of stepper motor phases is increased to ( N ) phases . For these reasons, the preceding technique is followed in the design of the sequence generator.

Design and Implementation of Sequence Generator Using LSI Circuits:
The design of sequence generator using LSI circuits is an effective technique since it minimizes the design and debugging efforts hence reducing the cost and increasing the speed performance of the system. Fig. (6) is the block diagram of sequence generator using LSI circuits which consists of three basic units. The counter unit controls the scan of any control sequence ( Up to 16 bytes ) using the low order address of the EPROM ,determines whether the motor stop or continue running and finally selects single step or continuous mode of operation.
The converting unit chooses the desired page of the EPROM according to input parameters (X,Y,T & D) by manipulating the high order address (8-bits) and gives an error indication in case of faulty parameters.
The last (EPROM) unit which representing the permanent storage for the sequence generator by storing all control sequences and giving the phase indicator of the motor.  fig.(7) and shall be explained in preceding paragraphs.

Fig (7):Circuit diagram of the sequence generator using LSI circuit The Counter Unit:
The MOD-16 counter is selected to be 4-bit counter with clear facility to cover ( 16 ) states needed for 8-phase stepper motor. For 4 and 8-phase stepper motor the number of states is equal to eight or sixteen for type A and type B sequences respectively. If 4 states are repeated four times and 8 states are repeated twice then all locations in a page are accessed avoiding erroneous pattern and extra decoding logic. The problem is when the number of phases is 3, 5, 6 or 7. This can be solved as follows: For 3-phase and 6-phase stepper motor and for type A and type B sequences number of states are equal to three, six or twelve respectively. Hence the three states are repeated four times, six states are repeated twice while twelve states are repeated once and not more in a page because it will exceed the capacity of a page, so a decoding circuit (AND gate) is needed to decode (1100) 2 count of MOD-16 counter when number of phases equals 3 or 6.
Decoding process is performed by using a multiplexer (8 to 1) to decode these conditions: When the Number of counting = Q D Q C Q B Q A 10 in decimal = 1 0 1 0 for 5 phases 12 in decimal = 1 1 0 0 for 3 & 6 phases 14 in decimal = 1 1 1 0 for 7 phases As the counter will counts ascending so AND gates of three inputs could be used instead of 4-input as it will pass to 10, 12 and 14 before 11, 13 and 15 respectively. As in the following: As a result, the resetting logic circuit consists of three AND gates and one multiplexer (74151) circuit that will automatically clear MOD-16 counter and canceling erroneous patterns by forcing the counter to count in legal locations of the EPROM.
The control section of MOD-16 counter consists of two parts; the first part is a single pole double through switch to run the motor continuously or to make the motor move step by step by selecting the continuous clock circuit or the single clock circuit.
The second part is to control start /stop operation. There is more than a way to stop the motor rotation, here is one suitable one by using an AND gate associated with a SR-latch to get a clear signal without any bouncing.

The Converting Unit:
The number of phases is set to the circuit by a thumbwheel switch (BCD) that gives 4 bits. As the system constructed to generate a sequence for maximum 8 phases then this number ( X ) will be minimized to 3 bits by a 4-16 decoder associated with a few NAND gates.
A magnitude comparator of 4-bit is used to give the user an error indication when the number of the first energized phases ( Y ) is equal or greater than the number of phases ( X ).

The EPROM Unit :
This store is divided into four logical partitions with 1Kbyte size for each partition to store the basic four types of previously discussed stepper motor control sequences as shown in fig.(8).
Each partition is subdivided into (8) banks since up to 8-phases stepper motor is required. Each bank is dedicated for one phase, in turn subdivided into (8) pages, and each page contains repeated states of each sequence and the number of pages defined by the number of sequences.

Fig. (8): EPROM Construction
The suitable pattern for such a type of motor is obtained from the data which is stored previously in a lookup table in specific locations of this memory. This is performed when the user decide to connect a certain stepper motor to the system. So the number of phases ( X ), the number of first energized phases ( Y ), the type of sequence ( type A or type B ) and the direction of rotation must be set in the system. All these data will set a certain address of the EPROM to specify a page that is related to the selected type of stepper motor operation. The counter will scan the content (Bytes) of the page to get the pattern needed for driving the motor.
As the capacity of the memory is 4 Kbyte so the address of the EPROM needs to be 12 bits, which are derived from the following distribution:

Q D Q C Q B Q A
4 bits representing the nibble coming from the counter. Y 2 Y 1 Y 0 3 bits representing the number of first energized phases that is set to the system by a thumbwheel switch. R 2 R 1 R 0 3 bits represent the number of phases in the stepper motor that is coming from the converter circuit output ( X-1 ). T The type of stepper motor sequence: T = 0 for type A. and T = 1 for type B. Hence the starting address is equal to 110H while ending address is 11FH which represents the page specified for the control sequence + 3 ( 1, 1 ).
By applying the above address distribution one can derive any absolute address for any desired sequence. Hence all the 96 sequences that are mentioned in the previous paragraph are stored in the memory as shown in table (3).
The complete map of the EPROM construction is shown in the Appendix.

Table ( 3 ) EPROM Construction Direction (D) Type (T) EPROM Addressing
Description The phase indicator circuit consisting of 8 LEDS to display the state of the control sequence so that any body can analyze the bit patterns of any control sequence at any time.
The terminals ( Φ1 -Φ8 ) are specialized to be connected to the driver circuit then to the stepper motor.

Experimental Results
The experimental system has been built and operated in the laboratory and all data for the stepper motor concerning 4 -phase with all different operating sequences are recorded : {+4 (

Conclusion
The system may be used as a laboratory test bench kit for any Variable Reluctance (V.R.) stepper motor constructed of three to eight phases. The design of the system could be modified so that the memory will be minimized to 2 Kbyte of EPROM but using up/down facility of the counter, in that condition the same page of the memory will be used for the clockwise and counter clockwise sequence with additional circuit to make different parallel process depending on motor phases. Also the circuit diagram that is designed in this paper might be changed with a single chip of FPGA using (Advance Boolean Expression Language ABEL) or another type of (Hardware Description Language HDL) for programming, to make all the control needed to perform scanning the suitable page of a certain sequence. Seven segment display may be used also for the design to have a short hand notation at the front panel such as + 5 ( 4 , 3 ) so that the user can see the type of sequence that is running. The work was carried out at the University of Mosul