Abstract
This paper reviews prior investigations into low noise amplifier (LNA) design. In this work, various modern LNA architectures will be examined, with a focus on five technologies: Cascode Distributed LNA, Coupled-Line Feedback in 0.15-m GaAs pHEMT Technology, Dual-Band CMOS LNA in 65-nm CMOS, CMOS LNA Using Post-distortion technique and 22-nm FD-SOI CMOS. In this review, Low power dissipation rate, input and output synchronization, high gain, and low noise levels are examined. In order to design a new successful LNA, each topology's performance is then examined. Future research will be conducted based on comparisons of these five topologies.
